Micron Technology DRAM SDRAM-DDR4, Part #: MT40A1G8SA-062E:E TR features: 

• VDD = VDDQ = 1.2V +/-60mv
• VPP = 2.5V, -125mV, +/-250mV
• On-die, internal, adjustable VREFDQ generation
• 1.2V pseudo open-drain I/O
• Refresh time of 8192-cycle at TC temperature range:
• 16 internal banks (x4, x8): 4 groups of 4 banks each
• 8n-bit prefetch architecture
• Programmable data strobe preambles
• Data strobe preamble training 
• Command/Address latency (CAL)
• Multipurpose register READ and WRITE capability
• Write Leveling
• Self refresh mode
• Low-power auto self refresh (LPSAR)
• Temperature controlled refresh (TCR)
• Fine granularity refresh
• Self refresh abort
• Maximum power saving
• Output driver calibration
• Nominal, park and dynamic on-die termination (ODT)
• Data bus inversion (DBI) for data bus
• Command/Address (CA) parity
• Databus write cyclic redundancy check (CRC)
• Per-DRAM addressability
• Connectivity test
• JEDEC JESD-79-4 compliant 
• sPPR and hPPR capability 
• MBIST-PPR support (Die Revision R only)

MIL:MT40A1G8SA-062E E TR

MT40A1G8SA-062E:E TR